Embodiments of the disclosure relate to a manufacturing method of an array substrate, an array substrate, and a display device.
Thin film transistor liquid crystal displays (abbreviated as TFT-LCDs) have characteristics such as small size, low power consumption, no radiation, and so forth, and have been dominating the current flat-panel display market. By virtue of Advanced Super Dimension Switch (abbreviated as ADS), an edge electric field is generated by inter-pixel electrodes in a same plane, such that rotation transformation in a plane direction (in parallel to the substrate) occurs to all the oriented liquid crystal molecules between and directly above the electrodes. ADS enlarges a viewing angle and improves light transmissivity of a liquid crystal layer. Moreover, with the development of the science and technology, display devices trend to be efficient, green and energy-saving.
In order to simplify the process in the prior art, a first electrode mask and a gate mask are generally formed with halftone mask plates to reduce the number of mask plates. FIGS. 1a-1d schematically illustrate, through structural sectional views, a process of a manufacturing method for an array substrate in the prior art. The manufacturing method includes the steps of sequentially depositing a first electrode layer 02 and a gate layer 03 on a base substrate 01, and coating a photoresist on the gate layer 03 to form a photoresist layer 04, exposing and developing the photoresist layer 04 using a halftone mask plate to form a structure as shown in FIG. 1a, etching the first electrode layer 02 and the gate layer 03 to form a structure as shown in FIG. 1b, ashing the photoresist layer 04 to form a structure as shown in FIG. 1c, wherein the first electrode in a bar shape formed at this time has a slight size difference in width from the corresponding gate, and a width of the first electrode is slightly smaller than that of the corresponding gate, then performing a second etching process on the gate layer 03 so that a width of the gate is reduced to form a structure as shown in FIG. 1d, wherein at this time, a width W1 of the first electrode is larger than a width W2 of the corresponding gate. That is, a distance L1 between two adjacent first electrodes is smaller than a distance L2 between two adjacent gates, which is disadvantageous to the increase of an aperture ratio of a display panel.